The growing complexity of space systems is creating the need for high-speed data networking technologies interconnecting different elements of a spacecraft to address increasingly demanding missions. This has spurred initiatives by both the European Space Agency (ESA) and the National Aeronautics and Space Administration (NASA) to define the next generation networking technologies for space. In both cases, Ethernet has been identified as the preferred choice due to its wide adoption in terrestrial applications and because it is fully standardized, thus ensuring interoperability. Deterministic versions of Ethernet are often used for safety-critical command and control functions onboard spacecraft. For example, the NASA advanced multi-purpose crew vehicle (supported by the European Space Agency) and the upcoming European launcher family, Ariane 6, are both employing Time-Triggered Ethernet (TTEthernet) [1] to realize their avionics needs [2].
The requirements for integrated circuits that must operate in space are very different from those that are used in terrestrial applications. In particular, the radiation is much more intense and causes several types of effects on the devices that compromise their reliability [3]. Therefore, special “rad-hard” design and manufacturing techniques are needed for devices that will operate in space. In SEPHY project novel techniques are elaborated and applied to design and manufacture a rad-hard Ethernet PHY (Physical Layer) for space applications [4].
Being executed by 6 recognized industrial and academic partners with clear non-overlapping responsibilities from 4 European countries, SEPHY targets the development of a first-class 10/100Mbps Ethernet PHY for the space market to enable Ethernet-based technologies to become an international space networking standard. This device will enable the use of Ethernet in space systems and also provide the starting point for the long-term objective of implementing a Gigabit Ethernet PHY for space. To implement the Ethernet PHYs efficiently, the consortium has significant analogue (Arquimea) and digital (IHP) design capabilities. In addition, it has also partners experienced in application of the Ethernet upper layers in space systems (TTTech) and in the design and implementation of Ethernet PHYs and Ethernet standards (Universidad Antonio de Nebrija). Finally, the electronic technology and manufacturing capabilities (Microchip Technology Nantes) allow for the production of samples of a future product for testing (Thales Alenia Space Spain).
Technical Approach
Ethernet is, as most communication protocols, structured in layers with the most relevant ones being the Medium Access Control (MAC) and the Physical (PHY) layer. The PHY layer interacts with the transmission media and ensures that data is transmitted with a low bit error rate. To that end the PHY devices implement advanced signal processing techniques. In fact, high speed Ethernet PHYs are complex mixed signal devices that pose significant implementation challenges because the physical layer transceiver is by nature a mixed-signal device processing analog signals from cables and transform the signals into digital signals at MAC. There are several Ethernet PHY standards supporting different types of transmission media and speeds, however, they need to be upgraded addressing radiation effects to enable widespread adoption of Ethernet in space.
The general idea of SEPHY is to use a radiation hardened FPGA that can withstand radiation and can serve as platform on which the system is implemented that reduces costs significantly. There has been some effort to implement programmable devices for mixed-signal circuits, but none of them are capable to withstand radiation to the best of our knowledge. SEPHY proposes a novel solution implemented as follows.
The SEPHY Ethernet transceiver is a mixed-signal device developed in Europe and is free from restrictions imposed by the International Traffic in Arms Regulations (ITAR). The physical layer transceiver deals with the transmission and reception of data over the physical medium ensuring reliable communication. Since the PHY interacts directly with the physical signals on the cable, it must contain an analogue front end capable of transmitting and receiving analogue signals. As the PHY connects to the digital MAC layer, it needs to perform complex digital signal processing and data controlling. Therefore, the physical implementation occurs by means of a mixed-signal ASIC – a complex semiconductor device that embeds in the same substrate analogue and digital functions.
The SEPHY device is compatible with 10BASE-T and 100BASE-TX Ethernet standards and it integrates all the physical-layer functions needed to transmit and receive data. The PHY supports the standard and reduced Media Independent Interface (MII/RMII) for direct connection to MAC (see Figure 1) and uses mixed-signal processing to perform equalization, data recovery, and error correction to achieve robust operation over CAT 5 twisted-pair wiring.
SEPHY implements two-fold radiation hardening approach: by design and by manufacturing process. The former is based on special circuit design techniques that can be applied at the system, architectural or layout level, e.g.: EDAC, TMR. The latter is accomplished by modifications during fabrication processes when the chip is being built to reduce the impact of radiation on integrated circuits, e.g.: use of specific insulator materials or the modification of doping profiles. Results are being tested in a radiation environment measuring the various radiation effects on the chip - single event upsets (SEU), latch-up (SEL) and total ionizing dose (TID), see [4] for more details.
The PHY behavior is and will be tested with regards to standard Ethernet and Time-Triggered Ethernet functionality. Figure 2 shows an Ethernet network setup and Figure 4 a testing setup used for the first successful validation of chip functionality. All test activities executed and planned in the project guarantee that the SEPHY device achieves a high maturity level such that it will be ready for qualification at the end of the project.
SEPHY impact and potential
The ambition of the SEPHY project is to put Europe at the forefront of the adoption of Ethernet PHYs in space systems. This is rather challenging as
the Ethernet commercial and industrial integrated circuit market is dominated by non-European companies (Intel, Broadcom, Marvell, etc.) and
Ethernet PHYs are complex mixed signal devices and there are no Ethernet PHYs qualified for space.
Since the PHYs are a key component in Ethernet, the success of SEPHY would not only ensure non-dependence but possibly a globally leading role in the future. Therefore, the goals are ambitious both technically and in terms of the long term strategic impact of the project.
The SEPHY project also targets to reuse the developed PHYs for other mission critical or safety-critical applications. These include automotive, aeronautics and industrial systems in which Ethernet is already or is likely to become the dominant data networking technology. This extends the ambition of the project beyond space systems. Enabling the use of the SEPHY physical layer transceivers for terrestrial applications could help in positioning Europe as a player in the Ethernet integrated circuit market (which is a large market with more than one hundred million devices sold every year).
Thus, the project results allow for a number of applications in cyber-physical systems especially those working in harsh environments. Such systems usually comprise a number of interconnected components, such as sensors, computing units, various types of actuators, etc., which must reliably communicate one with each other. Furthermore, for instance, in industrial applications multiple cyber-physical systems must exchange information about their internal states to ensure safe and correct execution of production processes. Being exposed to magnetic fields or various sources of radiation cyber-physical systems cannot use Ethernet controllers developed for common applications such as office or public networks. Since SEPHY uses rad-hard design and manufacturing approaches, its products guarantee reliable communication also in situations when common products fail. SEPHY can be used in a wide range of applications reaching from industrial to aerospace. However, the radiation tolerant design of the analog and digital blocks within the chip supports high-reliability in harsh radiation environments (aeronautics and space applications including launch vehicles and satellites) which is enabled by the wide operational temperature range.
SEPHY - overview
Project | SEPHY (Space Ethernet Physical Layer Transceiver) |
Duration | 01.05.2015 - 31.12.2018 |
Coordinator | Arquimea |
Programm | H2020-LEIT-Space-Competitiveness of the European Space Sector-2014 |
Grant Agreement | no. 640243 |
Total project costs | 3.115.222,50 Mio. Euro |
EC Funding | 100 % |
Partners | IHP, Thales Alenia Space España, Universidad Antonio de Nebrija, Microchip Technology Nantes, TTTech |

References
[1] Steiner, W., Bauer, G., Hall B., and Paulitsch, M. Time-triggered Ethernet: TTEthernet. In Time-Triggered Communication, R. Obermaisser, Ed. CRC Press, 2011.
[2] Loveless, A. TTEthernet for integrated spacecraft networks. In Proceedings of the AIAA Space and Astronautics Forum and Exposition (SPACE 2015), 2015.
[3] Schrimpf, R. D., and Fleetwood, D. M. Radiation effects and soft errors in integrated circuits and electronic devices. World Scientific, 2004.
[4 ] P. Reviriego, J. López, M. Sánchez-Renedo, V. Petrovic, J. F. Dufour and J. S. Weil, „The space Ethernet physical layer transceiver (Sephy) project: a step towards reliable Ethernet in space,“ in IEEE Aerospace and Electronic Systems Magazine, vol. 32, no. 1, pp. 24-28, 2017.
Authors: Anna Ryabokon and Matthias Mäke-Kail, TTTech
Acknowledgement: We would like to thank the European Commission for the funding and all project partners for their valuable contributions to the project that allowed us to write this paper.